Exemplary embodiments relate to a multi-chip package and, more particularly, to a stack-type multi-chip package for performing a test operation.
In increasing the integration degree of memory chips, the memory chips may be stacked. For example, 2, 4, or 8 memory chips are stacked in order to increase the integration degree of the memory chips.
Meanwhile, in a process of fabricating memory products, such as flash memory devices, the operations of memory cells for storing information are to be tested in order to check whether the memory cells have proper operating characteristics.
In general, the test operation of the memory cells is performed by comparing data, inputted to the memory cells, and data outputted from the memory cells.
In testing a device in which memory chips are stacked, each of the memory chips is to be tested. Here, the test time is increased with an increase in the number of stacked memory chips. In stacked-memory chip devices, it is useful to reduce the time for testing the memory chips.